Sensors, MEMS, Electronics – Page 374

The 2.4F2 Memory Cell Technology with Stacked-Surrounding Gate Transistor (S-SGT) DRAM

Suzuki M., Endoh T., Sakuraba H., Masuoka F., Tohoku University, JP

This paper reports that the Stacked-Surrounding Gate Transistor (S-SGT) DRAM achieves a cell size of 2.4F 2. The S-SGT DRAM is structured by stacking several SGT-type cells in series vertically. In order to realize cell [...]

Equation of p-n Junction for High Current Density Models of Transistor

Baskys A., Semiconductor Physics Institute, LT

The results of theoretical and experimental investigations of p-n junction at junction voltages close to the potential barrier are presented. It is shown that in such a situation the voltage-current characteristic can be described by [...]

Study of Well Barrier Hole Burning in Quantum Well Bistable Lasers

Ganesh Madhan M., Vaya P.R., Gunasekaran N., Anna University, IN

Quantum carrier capture and release effects on optical bistability in multiple quantum well (MQW) lasers are studied using the well barrier hole burning model. The ratio of carrier capture to release time (h) is varied [...]

Modelling Multilayer Semiconductor Structures

Brecl K., Furlan J., University of Ljubljana, SI

The interest in multilayer thin-film semiconductor structures is becoming bigger day by day. For multilayer structures both, low-quality and good-quality materials are used. An extended Ebers-Moll model for simulating multiayer structures was developed. The standard [...]

Study of Voltage Tunable Asymmetric Quantum Well Structure for Infrared Detection

Vaya P.R., Ananda Natarajan S., Srinivasan K.R., Indian Institute of Technology, IN

The performance of GaAs/AlGaAs asymmetric quantum well infrared detectors exhibiting inter subband absorption has been studied. The asymmetric quantum well structure considered for the present study consists of two regions, a step quantum well with [...]

Two-Dimensional MOSFET Dopant Profile by Inverse Modeling via Source/Drain-to-Substrate Capacitance Measurement

Chiang C.Y.T., Yeow Y.T., Ghodsi R., University of Queensland, AU

This paper proposes and demonstrates a new approach to 2-dimensional dopant profile extraction for MOSFET's by treating the source/drain-to-substrate junction as a gated diode. The small-signal capacitance of the diode measured as a function of [...]

Investigation of High Frequency Noise in a SiGe HBT Based on Shockley’s Impedance Field Method and the Hydrodynamic Model

Decker S., Neinhus B., Heinemann B., Jungemann C., Meinerzhagen B., University of Bremen, DE

This paper presents the first simulation of the minimum noise figure of a heterojunction bipolar transistor based on Shockley's impedance field method and the hydrodynamic model. The hydrodynamic model and the impedance field method are [...]

Modelling of the “Gated-Diode” Configuration in Bulk MOSFET’s

Yip A., Yeow Y.T., Samudra G.S., Ling C.H., TECH Semiconductor, SG

A study of the “gated-diode” configuration in MOSFET’s for characterising hot-carrier degradation by employing 2-D simulations is presented in this paper. We use both process and device simulations to understand operational sensitivity of this technique. [...]

Optimization of FIBMOSs through 2-D Device Simulations

Kang J., Schroder D.K., Pivin D.P., Arizona State University, US

Channel engineering can enhance the performance of MOSFETs. Focused ion beam (FIB) implant technology is one approach for such channel engineering. We have investigated FIB and present a sophisticated optimization technique for FIB MOSFETs (FIBMOS) [...]

Tunneling-Assisted Currents in n+p+ Amorphous Silicon Junctions

Furlan J., Gorup Z., University of Ljubljana, SI

A theoretical model for the tunneling transport of charge carriers in forward-biased heavily doped amorphous silicon pn junctions was recently presented. In this paper, in addition to current-voltage characteristics in the forward direction, reverse-voltage characteristics [...]