Papers – Page 940 – TechConnect Briefs

USIM Design Considerations

Bell A., Singhal K., Gummel H., Agere Systems, US

Compact models need to be carefully designed to predict circuit behavior efficiently, accurately and robustly. A variety of effects must work together and be consistently integrated into the model equations with redundancy. USIM is a [...]

A Basic Property of MOS Transistors and its Circuit Implications

Vittoz E., Enz C., Krummenacher F., Swiss Center for Electronics & Microtechnology, CH

The MOS transistor drain current is the (linear) superposition of independent and symmetrical effects of source and drain voltages. This basic property is not affected by the geometry or symmetry of the transistor, by the [...]

Implications of Gate Tunneling and Quantum Effects in the Gate-Channel Stack

Dutton R., Choi C-H, Stanford University, US

Simulation and modeling of gate tunneling current for thin-oxide MOSFETs and Double-Gate SOIs are discussed. Guidelines for design of leady MOS capacitors are proposed. Resonant gate tunneling current in DG SOI is simulated, based on [...]

Implementation and Simulation of Fast Inverter Control Algorithms with the use of FPGA Circuit

Jastrzebski R., Napieralski A., Pyrhonen O., Saren H., Technical University of Lodz, PL

DTC (Direct Torque Control) techniques incorporating fast microprocessors and DSPs have made possible the application of AC motors for high-performance applications where traditionally the DC motors were applied. In this paper the DTC algorithm implemented [...]

Electronic Nanotechnology Based on Non-Binary Principles

Mathew J., Dubrova E., Tenhunen H., Royal Institute of Technology, Stockholm, SE

This paper describes alternative to binary number representations and discuss possibilities for implementing multiple-valued functions using chemically assembled electronic nanotechnology. The implementation of a four-valued adder using molecular diodes is presented. The proposed structure is [...]

A Physical Compact MOSFET Mobility Model Including Accurate Calculation of Saturation Surface Potential

Benson J., D’Halleweyn N.V., Mistry K., Redman-White W., University of Southampton, UK

This paper describes a MOSFET vertical mobility model that has been implemented in a surface potential based compact model [1]. The main scattering mechanisms (surface roughness, phonon, and Coulomb) are accounted for using an expression [...]

Theory of Spin Transport in an n-typed GaAs Quantum Well

Wu M.W., Weng M.Q., Univ. of Science & Technology of China, CN

We perform a many-body investigation of the spin diffusion/transport in an n-doped GaAs QW based on a set of many-body kinetic transport equations. These equations are derived for the spatial inhomogeneous system by using nonequilibrium [...]

Threshold Voltage Shifts in Narrow-Width SOI Devices Due to Quantum Mechanical Size-Quantization Effects

Ahmed S.S., Vasileska D., Arizona State University, US

We investigate the role of quantum-mechanical size-quantization effects in narrow-width SOI devices. In these structures, carriers experience a two dimensional confinement in a square quantum well at the semiconductor-oxide interface. This results not only in [...]

Quantum mechanical effects correction models for inversion charge and I-V characteristics of the MOSFET device

Abebe H., Cumberbatch E., MOSIS, US

A 1-dimensional analytic quantum mechanical effects correction formula for the MOSFET inversion charge and I-V characteristics are derived from the density gradient (DG) model using matched asymptotic expansion techniques. The primary theoretical framework for this [...]

Quantum and Kinetic Simulation Tools for Nano-scale Electronic Devices

Fedoseyev A., Kolobov V., Arslanbekov R., Przekwas A., Balandin A., CFD Research Corporation, US

The progress in LSI technologies has resulted in scaling down semiconductor devices to nano-scale dimensions where kinetic and quantum effects in the carrier transport become crucial for the device performance. The transistor counts on the [...]