An empirical correlation model of Idlow, the MOSFET drain current measured at Vgs=Vdd/2 and Vds=Vdd, where Vdd is the supply voltage, is proposed based on the alpha-power law model. It enables a comprehensive analysis of Idlow over a wide range of device geometry, supply voltage, and temperature in multi-threshold-voltage technologies. Built upon and verified by electrical-test data of 90nm partially-depleted (PD) silicon-on-insulator (SOI) technologies, the newly developed methodology provides practical and efficient guidelines to device target projection and target-based speculative SPICE model extraction.
Journal: TechConnect Briefs
Volume: 3, Technical Proceedings of the 2006 NSTI Nanotechnology Conference and Trade Show, Volume 3
Published: May 7, 2006
Pages: 831 - 834
Industry sector: Sensors, MEMS, Electronics
Topics: Compact Modeling