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HomeKeywordscompact model

Keywords: compact model

A Distributed Compact Model for High-Density, On-Chip Trench Capacitors in High-Frequency Applications

Shastri S., Wu Y., Cai W.Z., Grivna G., ON Semiconductor, US
In this paper we describe for the first time a distributed model for the trench capacitor, which includes process parameters that may be extracted from the low-frequency measurement of one or two capacitor geometries. The [...]

Compact Model of a Laminar Micro Mixer

Cupelli C., Koltay P., Zengerle R., Santer M., University of Freiburg, DE
In this paper we discuss a novel approach towards a system-level description for microreactors. In particular, a compact model for laminar micromixers for fluids with different viscosities is presented. We show how the well known [...]

Compact Models for Squeeze-Film Damping in the Slip Flow Regime

Sattler R., Wachutka G., Technical Univeristy of Münich, DE
We propose a mixed-level simulation scheme for squeeze film damping effects in microdevices, which makes it possible to include damping effects in system-level models of entire microsystems in a natural, physically-based and flexible way. Our [...]

Extending the Validity of Existing Squeezed-Film Damper Models with Elongations of Surface Dimensions

Veijola T., Pursula A., Helsinki University of Technology, FI
Border flow effects in squeezed-film dampers having a gap separation comparable with the surface dimensions are studied with 2D and 3D FEM simulations and with analytic models derived from the linearized Reynolds equation for small [...]

New Capabilities for Verilog-A Implementations of Compact Device Models

Mierzwinski M., OHalloran P., Troyanovsky B., Mayaram K., Dutton R.W., Tiburon Design Automation, US
Acceptance of a model requires its availability in main-stream simulators, yet it can be difficult to get a new model into commercial simulators. In this paper we present simulation results using a compiled Verilog-A architecture [...]

Predicting the SOI History Effect Using Compact Models

Na M-H, Watts J.S., Nowak E.J., Williams R.Q., Clark W.F., IBM Corporation, US
A simple and effective compact model methodology that predicts the history effect in silicon-on-insulator (SOI) is discussed. In this study we employ three physical parameters to modify the body-potentials of SOI FETs in an inverter [...]

Improved Compact Model for Four-Terminal DG MOSFETs

Nakagawa T., Sekigawa T., Tsutsumi T., Hioki M., Suzuki E., Koike H., National Institute of Advanced Industrial Science and Technology, JP
Double-gate field-effect transistors are promising device structures which have excellent scalability. To evaluate merits of DG MODFETs, we developed a compact four-terminal DG MOSFET model by adopting the double charge-sheet model. In this presentation, we [...]

A Trial Report: HiSIM-1.2 Parameter Extraction for 90 nm Technology

Iino Y., Silvaco Japan, JP
This paper reports HiSIM-1.2 Spice model parameter extraction for a practical 90 nm technology devices. The extraction sequence with the measurement data will be exhibitted. The number of optimized HiSIM parameters were only 19 out [...]

Floating Gate Devices: Operation and Compact Modeling

Pavan P., Larcher L., Marmiroli A., Università di Modena e Reggio Emilia, IT
This paper describes a possible approach to Compact Modeling of Floating Gate devices. Floating Gate devices are the basic building blocks of Semiconductor Nonvolatile Memories (EPROM, EEPROM, Flash). Among these, Flash are the most innovative [...]

Bias Dependent Modeling of Collector-Base Junction Effects in Bipolar Transistors

Tran H., Schroter M., University of Technology Dresden, DE
An analytical formulation for the voltage and current dependent electric field in the collector of a bipolar transistor is presented. The new field expression is then employed for calculating the base-collector depletion capacitance and the [...]

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