Napieralski A. – TechConnect Briefs

Positioning of Thermal Via Regions for Reducing Hotspot Temperature in 3D ICs

Maj C., Galicia M., Zajac P., Napieralski A., Lodz University of Technology, PL

The increase of the processor performance is the most desired result of technology evolution. As today’s technology reaches its limits, some other methods has to be developed to uphold performance increase. One of the promising [...]

Application of ant colony optimization algorithm to the thermal parameter estimation of modern electronic structures

Raszkowski T., Samson A., Zubert M., Janicki M., Napieralski A., Lodz University of Technology, PL

Modelling of the heat transfer parameters is a very important issue and crucial aspect of the proper operating of every modern electronic structure and device. Therefore, the accurate estimation of all thermal parameters may contribute [...]

3-D Thermal Simulator Dedicated for Modern Silicon Structures

Zubert M., Raszkowski T., Janicki M., Samson A., Jankowski M., Napieralski A., Lodz University of Technology, PL

The accurate thermal modelling of nanoscale chips is of vital importance, as heat dissipation is arguably one of the most important problems in modern integrated circuits. As the technology node is expected to continue to [...]

Time-Domain Monte-Carlo and Noise Analysis of MAPS Sensors

Jankowski M., Napieralski A., Lodz University of Technology, PL

A non-typical approach to extended simulational analysis for monolithic active pixel (MAPS) based binary pixel readout circuits is presented. Circuit solutions and simulation results are presented and discussed. Applications of particle detection/tracking are quite wide, [...]

High-voltage Edge-rounded Adjustable Trapezoidal Waveform Generators

Jankowski M., Napieralski A., Lodz University of Technology, PL

An approach to design low-voltage and high-voltage trapezoidal waveform generators with edge-rounding ability is described. The paper presents circuits able to produce edge-rounded trapezoidal waveforms, endowed with several means of waveform parameter adjustments. Signal paths [...]

The Heat transfer in Fin-FET transistor

Zubert M., Janicki M., Raszkowski T., Samson A., Napieralski A., Lodz University of Technology, PL

The electro-thermal analysis is one of the most important development steps in the professional design of analogue submicron electric ICs, power modules design process as well as modern nanostructures. This analysis is useful to power [...]

Application of Dual-Phase-Lag Model for Thermal Analyses of Electronic Nanostructures

Janicki M., Zubert M., Samson A., Napieralski A., Lodz University of Technology, PL

This paper presents the Dual-Phase-Lag (DPL) equation as a possible candidate to model heat transfer processes in electronic nanostructures. The analyses presented in this paper are carried out for a thin one-dimensional slab heated on [...]

Modeling of Electromagnetic Phenomena Inside Modern Integrated Semiconductor Structures

Zubert M., Jankowski M., S. Nowak P., Raszkowski T., Samson A., Napieralski A., Lodz University of Technology, PL

The modeling and simulation of electromagnetic phenomena can be useful in modern ICs. This is an important issue, because of the direction of development of new semiconductor technologies. The distance between devices constantly decreases, while [...]

Current-mode Processing Possibilities in HV SoI Integrated Systems

Jankowski M., Napieralski A., Lodz University of Technology, PL

The paper discusses possibilities of current-mode based functional block implementation into signal path of HV SoI voltage-mode circuits. The topic arose as an effect of research on HV SoI ASICs for automotive applications. It turned [...]

Optimized Topology of an ASIC for Thermal Analysis of Multi-Core Processors

Szermer M., Kotynia L., Zajac P., Janicki M., Napieralski A., Lodz University of Technology, PL

The main goal of the paper is to present the optimized ASIC design for the investigation of thermal-coupling among cores in multi-core processors. In short, we designed a dedicated ASIC composed of regular 16x24 heat [...]