Janicki M. – TechConnect Briefs

Application of ant colony optimization algorithm to the thermal parameter estimation of modern electronic structures

Raszkowski T., Samson A., Zubert M., Janicki M., Napieralski A., Lodz University of Technology, PL

Modelling of the heat transfer parameters is a very important issue and crucial aspect of the proper operating of every modern electronic structure and device. Therefore, the accurate estimation of all thermal parameters may contribute [...]

3-D Thermal Simulator Dedicated for Modern Silicon Structures

Zubert M., Raszkowski T., Janicki M., Samson A., Jankowski M., Napieralski A., Lodz University of Technology, PL

The accurate thermal modelling of nanoscale chips is of vital importance, as heat dissipation is arguably one of the most important problems in modern integrated circuits. As the technology node is expected to continue to [...]

The Heat transfer in Fin-FET transistor

Zubert M., Janicki M., Raszkowski T., Samson A., Napieralski A., Lodz University of Technology, PL

The electro-thermal analysis is one of the most important development steps in the professional design of analogue submicron electric ICs, power modules design process as well as modern nanostructures. This analysis is useful to power [...]

Application of Dual-Phase-Lag Model for Thermal Analyses of Electronic Nanostructures

Janicki M., Zubert M., Samson A., Napieralski A., Lodz University of Technology, PL

This paper presents the Dual-Phase-Lag (DPL) equation as a possible candidate to model heat transfer processes in electronic nanostructures. The analyses presented in this paper are carried out for a thin one-dimensional slab heated on [...]

Optimized Topology of an ASIC for Thermal Analysis of Multi-Core Processors

Szermer M., Kotynia L., Zajac P., Janicki M., Napieralski A., Lodz University of Technology, PL

The main goal of the paper is to present the optimized ASIC design for the investigation of thermal-coupling among cores in multi-core processors. In short, we designed a dedicated ASIC composed of regular 16x24 heat [...]

Thermal Coupling in Technologies Based on Tri-gate Transistors

Janicki M., Zajac P., Szermer M., Napieralski A., Lodz University of Technology, PL

This paper presents the analyses of static and dynamic thermal coupling among microsystem components for technologies based on tri-gate transistors. Simulations were carried out using Green’s function thermal solver based on power trace data computed [...]

Authors: Janicki M.

Application of ant colony optimization algorithm to the thermal parameter estimation of modern electronic structures

3-D Thermal Simulator Dedicated for Modern Silicon Structures

The Heat transfer in Fin-FET transistor

Application of Dual-Phase-Lag Model for Thermal Analyses of Electronic Nanostructures

Optimized Topology of an ASIC for Thermal Analysis of Multi-Core Processors

Thermal Coupling in Technologies Based on Tri-gate Transistors

Boundary Condition Independence of Cauer RC Ladder Compact Thermal Models

Design of ASIC Dedicated to Thermal Analysis of Many-Core Architectures

The accurate Electro-Thermal Model of Merged SiC PiN Schottky Diodes

Test ASIC for Real Time Estimation of Chip Temperature