Chaujar R. – TechConnect Briefs

Threshold Voltage Model of Hetero Gate Dielectric-Dual Material Gate-GAA-Tunnel FET

Madan J., Gupta R.S., Chaujar R., Delhi Technological University, IN

In this paper, a hetero gate dielectric, dual material gate, gate all around tunnel field effect transistor (HD-DMG-GAA-TFET) has been proposed. An analytical model for the same has been developed to examine the band to [...]

Analysis of Small Signal Behaviour of Transparent Gate Recessed Channel (TGRC) MOSFET for High Frequency/RF Applications

Kumar A., Gupta N., Chaujar R., Delhi Technological University, IN

In this paper, small signal behavior have been investigated for Transparent Gate Recessed Channel (TGRC) MOSFET in terms of Y-parameters and Z-parameters, the results are compared with Conventional Recessed Channel (CRC) MOSFET at THz frequency [...]

TCAD Analysis of Small Signal Parameters and RF Performance of Heterogeneous Gate Dielectric-Gate All Around Tunnel FET

Madan J., Gupta R.S., Chaujar R., Delhi Technological University, IN

In this paper the small signal parameters of n-type heterogeneous gate dielectric gate all around tunnel FET (n-type-HD-GAA-TFET) and n-GAA-TFET are analyzed in terms of parasitic capacitance and RF figure of merits (FOM)such as cut [...]

TCAD Analysis of Frequency Dependent Intrinsic and Extrinsic Parameters of GEWE-SiNW MOSFET

Gupta N., Kumar A., Chaujar R., Delhi Technological University, IN

In this paper, extrinsic parameters of Gate Electrode Workfunction Engineered (GEWE) Silicon Nanowire MOSFET is analyzed in terms of parasitics capacitances, resistances and inductances using 3D-TCAD device simulations. The extracted parameters have been compared with [...]

TCAD AC analysis of Gate Electrode Workfunction Engineering Silicon Nanowire MOSFET for High Frequency Applications

Gupta N., Kumar A., Chaujar R., Delhi Technological University, IN

In this paper, we present the quantitative investigation of the high frequency performance of Gate Electrode Workfunction Engineered Si-Nanowire (GEWE-SiNW) MOSFET up to THz and compared with its conventional counterparts using device simulators: ATLAS and [...]

TCAD Analysis of Silicon-Germanium (SiGe) Based Back-Contact Back-Junction (BC-BJ) Solar Cell-an Alternative for Silicon Based Cells

Pandey R., Chaujar R., Delhi Technological University, IN

In this work, an ultra-thin, Back-Contact Back-Junction (BC-BJ) Crystalline Silicon-Germanium (SiGe) solar cell device structure called BC-BJ c-SiGe solar cell has been proposed. The results, are compared with conventional BC-BJ silicon cell. SiGe is used [...]

TCAD Thermal Analysis of Gate Workfunction Engineered Recessed Channel MOSFET

Arora G., Monika M., Chaujar R., Delhi Technological University, IN

This paper discusses the thermal analysis of Gate Electrode Workfunction Engineered Recessed Channel (GEWE-RC) MOSFET involving an RC and GEWE design integrated onto a conventional MOSFET. Furthermore, it focuses on the comparative study of conventional [...]

Linearity evaluation of Silicon Nanowire Surrounding Gate MOSFET for high performance ULSI applications

Aggarwal N., Sikka K., Gupta I., Chaujar R., Delhi Technological University, IN

The inspiration of this work is that the search for high performance ICs has led to scaling of MOSFETs down to sub-50nm regime and thus Silicon Nanowire (SNW) MOSFETs offer a promising solution for realizing [...]

Investigation of Frequency Dependent Noise Performance Metrices for Gate Electrode Work function Engineered Recessed Channel MOSFET

Agarwala A., Chaujar R., Delhi Technological University, IN

As MOSFET device sizes and signal levels are aggressively scaled down, the low-frequency noise (LFN) properties become increasingly important. This paper predicts the feasibility of a novel design i.e., Gate Electrode Work function Engineered Recessed [...]

Linearity Performance Assessment of Nanoscale Gate Material Engineered Trapezoidal Recessed Channel (GME-TRC) MOSFET for RFIC design and Wireless application

Malik P., Chaujar R., Gupta M., Gupta R.S., Gupta M., Gupta R.S., Semiconductor Devices Research Laboratory, IN

In this work, an extended study of linearity behaviour of proposed Gate Material Engineered-Trapezoidal Recessed Channel(GME-TRC) MOSFET(Fig.1.) has been performed using ATLAS and DEVEDIT device simulators and the results so obtained are compared with Trapezoidal [...]