Nanoelectronics – Page 46 – TechConnect Briefs

Ab initio calculation of tunneling current through ultra-thin SiO2 gate dielectric of MOS Structure, including the influence of oxygen vacancies on the tunneling current

Nadimi E., Janisch R., Radehaus C., TU Chemnitz, DE

We used a first-principle atomistic scale method, based on density functional theory and non-equilibrium Green’s function to study the electron tunneling current through ultra thin silicon oxide films. The Si/SiO2 model interface has been constructed [...]

Nanoscale Device Modeling and Simulation: Multiple Independent gate Field Effect Transistor

Kim H-G, Inha University, KR

we report our numerical modeling and simulation results for MIGFET. The simulation result revealed that MIGFET demonstrates dynamic modulation of sub-threshold swing and threshold voltage by biasing the second gate. And Short channel effects are [...]

Robust design of quantum potential profile for electron in semiconductor nanodevices

Zhang J., Kosut R., SC Solutions, US

In this paper we address the robust design of the quantum potential profile in a in semiconductor nanodevice to achieve a desired electron transmission coefficient vs. bias voltage characteristic despite uncertainty. We formulate an optimization [...]

Electron Effective Mass Of GaAs Double-Concentric Quantum Rings

Filikhin I., Deyneka E., Vlahovic B., North Carolina Central University, US

We carried out the calculations for the single carrier energy levels, and the optical transitions of these structures, with taking into account the effects resulting in change of the electron effective mass due to the [...]

First-principles Modeling of Magnetic Memory Components — Preliminary Results on the Effects of Interface Oxides

Stilling M., Stokbro K., Flensberg K., Atomistix, DK

Magnetotunnel junctions (MTJs), exhibiting high tunneling magnetoresistance (TMR), are currently being employed in new generations of hard disk drive (HDD) read heads and novel magnetic random access memory (MRAM) technology. We have modeled such spintronic [...]

Another Look at Organic/Metal Interfaces: Correlation with Experiment

Mitrasinovic P.M., Center for Multidisciplinary Studies, University of Belgrade, YU

A general methodology for the determination of the nature of the interfacial interactions is proposed by investigating the changes of the organic/metal bond critical parameters as consequences of both increasing the size and changing the [...]

N-channel Single Crystal Si Nanoparticle Schottky Barrier Transistor

Song S.H., Ding Y., Kortshagen U., Bapat A., Campbell S.A., University of Minnesota, US

A novel process has been developed by when large (~40 nm) cubic single crystals of silicon can be produced at high rates. In a previous paper we demonstrated that these particles can be used to [...]

1/f Noise and RTS(Random Telegraph Signal) Errors in Comparators and Sense Amplifiers

Forbes L., Miller D.A., Poocharoen P., Oregon State University, US

An analysis has previously been made of the increasing portion of the threshold voltage being occupied by thermal noise levels and the bit error rates in digital logic[1] and memory circuits [2-4]. This analysis has [...]

High Frequency Characteristics of Nanoscale Silicon Nanowire FET

Li Y., Hwang C-H, National Chaio Tung University, TW

Nanoscale multigate field effect transistors (FETs) are potentially next-generation device candidates for achieving the high performance targets of the ITRS due to their superior reduction of the short channel effects and excellent compatibility with planar [...]

Random Discrete Dopant Fluctuated Sub-32 nm FinFET Devices

Li Y., Hwang C-H, Yu S-M., Huang H.M., Chen H-M, National Chaio Tung University, TW

Scaling of silicon production technology has approached the sub-65nm regime. Device’s electrical characteristics fluctuate according to the discreteness and randomness of dopants in sub-32nm technologies. In this paper, we investigate the random-dopant-induced electrical characteristics fluctuations, [...]