Verilog-A – TechConnect Briefs

SPICE Compact Modeling for Design of Innovative Integrated Circuits in CEA-LETI

Martin P., Lucci L., Reyboz M., Barbe J.-C., CEA-LETI, FR

This paper presents an overview of the recent compact modeling activity in CEA-LETI. Examples of Verilog-A modeling using the surface potential approach of field effect transistors, such as High Electron Mobility Transistors (HEMTs) AlGaN/GaN power [...]

Developing a Common Compact Modeling Platform for Model Developers and Users

Zhang L., Chan M., HKUST, HK

With the recent advance of CMOS technology to the 32nm range, there is a major concern to continue the scaling roadmap. Many new devices have been proposed, but selecting the right structure is not a [...]

Guidelines for Verilog-A Compact Model Coding

Depeyrot G., Poullet F., Dolphin Integration, FR

Verilog-A has practically become the standard for developing and coding compact device models. However, contrarily to the Verilog standard, where the IEEE has defined syntax and semantic rules for both simulation and synthesis (IEEE1364-2001 and [...]

Keywords: Verilog-A

SPICE Compact Modeling for Design of Innovative Integrated Circuits in CEA-LETI

Developing a Common Compact Modeling Platform for Model Developers and Users

Guidelines for Verilog-A Compact Model Coding

Recent Advancements on ADMS Development

Correlated Noise Modeling and Simulation

New Capabilities for Verilog-A Implementations of Compact Device Models

Design & Simulation of a CMOS MEMS using Standard Microelectronic CAD Environment

Changing the Paradigm for Compact Model Integration in Circuit Simulators Using Verilog-A