Construction of a Compact Modeling Platform and Its Application to the Development of Multi-Gate MOSFET Models for Circuit Simulation
Miura-Mattausch M., Chan M., He J., Koike H., Mattausch H.J., Miura-Mattausch M., Nakagawa T., Park Y.J., Tsutsumi T., Yu Z., Hiroshima University, JP
We are reporting the construction of a common platform for compact model development based on the Verilog-A language and in particular a framework for efficient development of multi-gate MOSFET models for circuit simulation. Phenomena expected [...]