Krishnan S. – TechConnect Briefs

Model Implementation for Accurate Variation Estimation of Analog Parameters in Advanced SOI Technologies

Suryagandh S., Subba N., Wason V., Chiney P., Wu Z-Y, Chen B.Q., Krishnan S., Rathor M., Icel A., Advanced Micro Devices, US

Analog design uses transistors with longer channel length for high performance. gm, Rout and intrinsic gain form the matrix to gauge this performance. It is critical to design these circuits for manufacturing variability. This work [...]

On Idlow with Emphasis on Speculative SPICE Modeling

Chen Q., Wu Z-Y, Icel A.B., Goo J-S, Krishnan S., Thuruthiyil C., Subba N., Suryagandh S., An J.X., Ly T., Radwin M., Yonemura J., Assad F., Advanced Micro Devices, US

An empirical correlation model of Idlow, the MOSFET drain current measured at Vgs=Vdd/2 and Vds=Vdd, where Vdd is the supply voltage, is proposed based on the alpha-power law model. It enables a comprehensive analysis of [...]

Monte Carlo Transport Calculations of Strained SiGe Heterostructures from Ab-Initio Band-structures

Zorman B., Krishnan S., Vasileska D., Xu J., Van Schilfgaarde M., Arizona State University, US

The continued scaling of semiconductor devices creates numerous challenges which have to be overcome in order to achieve device behavior that satisfies speed and power constraints. Possible alternatives to conventional CMOS devices include strained-Si or [...]

Hole Transport Simulations in p-channel Si MOSFETs

Krishnan S., Vasileska D., Fischetti M.V., Arizona State University, US

We use a Monte Carlo method to investigate hole transport in ultrasmall p-channel MOSFETs with gate lengths of 25 nm. To model band-structure effects like warping, anisotropy and non-parabolicity on carrier transport, our device simulator [...]