Nanoelectronics – Page 9 – TechConnect Briefs

Analysis of Small Signal Behaviour of Transparent Gate Recessed Channel (TGRC) MOSFET for High Frequency/RF Applications

Kumar A., Gupta N., Chaujar R., Delhi Technological University, IN

In this paper, small signal behavior have been investigated for Transparent Gate Recessed Channel (TGRC) MOSFET in terms of Y-parameters and Z-parameters, the results are compared with Conventional Recessed Channel (CRC) MOSFET at THz frequency [...]

TCAD Analysis of Small Signal Parameters and RF Performance of Heterogeneous Gate Dielectric-Gate All Around Tunnel FET

Madan J., Gupta R.S., Chaujar R., Delhi Technological University, IN

In this paper the small signal parameters of n-type heterogeneous gate dielectric gate all around tunnel FET (n-type-HD-GAA-TFET) and n-GAA-TFET are analyzed in terms of parasitic capacitance and RF figure of merits (FOM)such as cut [...]

TCAD Analysis of Frequency Dependent Intrinsic and Extrinsic Parameters of GEWE-SiNW MOSFET

Gupta N., Kumar A., Chaujar R., Delhi Technological University, IN

In this paper, extrinsic parameters of Gate Electrode Workfunction Engineered (GEWE) Silicon Nanowire MOSFET is analyzed in terms of parasitics capacitances, resistances and inductances using 3D-TCAD device simulations. The extracted parameters have been compared with [...]

TCAD AC analysis of Gate Electrode Workfunction Engineering Silicon Nanowire MOSFET for High Frequency Applications

Gupta N., Kumar A., Chaujar R., Delhi Technological University, IN

In this paper, we present the quantitative investigation of the high frequency performance of Gate Electrode Workfunction Engineered Si-Nanowire (GEWE-SiNW) MOSFET up to THz and compared with its conventional counterparts using device simulators: ATLAS and [...]

Arsenene Substrates Enable a New Era of High-Performance Semiconductors

Zavitz D., Kubricky J., CSI2D, US

Chicago Semiconductor achieved a breakthrough in fabricating two-dimensional layers of Arsenene and Silicene. This was realized for uniform deposition of Arsenic-on-Silicon(112) and Silicene on Silicon (112). The key to stable and uniform Arsenene-on-Silicon (AeOS) and [...]

Nanoelectronics, Materials & Devices

Design and Evaluation of a Highly Stretchable and Conductive Thin Film for Tactile Sensors

Sun Y., Zhou D., Bai J., Wang H., Cao J., Univeristy of Minnisota Duluth, US

Keeping good conductivity at high stretching strain is one of the main requirements for the design of flexible electronic devices. The elastic nature of siloxane-based elastomers enables many innovative designs in wearable sensor devices and [...]

Wafer-Scale Planarization using Location Specific Gas Cluster Ion Beam (GCIB) in Advanced CMOS Logic Technology

Moon Y., Qin L., Koli D., Snow C., GlobalFoundries, US

In sub-14nm advanced CMOS logic technology, controlling wafer-scale planarization or uniformity became tremendously critical. This is mainly due to the CMOS integration scheme where chemical mechanical polishing (CMP) is used to create the transistor gate. [...]

Fabrication of highly ordered vertical GaAs nanowires by inductively coupled plasma etching and their modal analysis

Dhindsa N., Chia A., Boulanger J., Khodadad I., LaPierre R., Walia J., Saini S., University of Waterloo, CA

We present highly ordered vertical gallium arsenide (GaAs) nanowires fabricated by dry etching using various metal mask combinations. A great control on the length, diameter, pitch and facet tapering of the nanowires was achieved. Diameters [...]

Topic: Nanoelectronics