Nanoelectronics – Page 32 – TechConnect Briefs

Subthreshold Operation of Schottky Barrier Silicon Nanowire FET

Yoo S.K., Ahn J.Y., Yang S., Lee J-H., Gwangju Institute of Science & Technology (GIST), KR

This paper presents that the sensitivity of Schottky barrier silicon nanowires FET (SB-SiNWFET) is strongly modulated by the applied back gate voltage, and reveals that the operation in the subthreshold regime gives the significant enhancement [...]

Long-Range Interactions in Quasi-One Dimensional Cylindrical Structures

Tatur K., Woods L.M., University of South Florida, US

Casimir forces originating from vacuum fluctuations of the electromagnetic fields are of increasing importance in many scientific and technological areas. The manifestations of these long-range forces at the nanoscale have led to the need of [...]

Electrical Characteristics of Nanoscale Multi-Fin Field Effect Transistors with Different Fin Aspect Ratio

Cheng H-W, Hwang C-H, Li Y., National Chiao Tung University, TW

For nano-CMOS device design, the device with multiple-fin structure has the superior short channel effect (SCE), high driving current and has been considered as an index as potential candidates. The feasibility of various multi-fin options [...]

Atomistic Electrostatic Simulations Using Spice

Forbes L., Miller D.A., Jacob M.E., Oregon State University, US

The technique employed here to describe the three dimensional electrostatic field in a nano-scale CMOS n-channel FET near the threshold of conduction is using SPICE to solve the electrostatic equations. An atomistic solution will be [...]

Characteristic Variability of Novel Lateral Asymmetry Nano-MOSFETs Due to Random Discrete Dopants

Lee K-F, Hwang C-H, Li T-Y, Li Y., Li T-Y, Li Y., National Chiao Tung University, TW

In this paper, we for the first time investigate the random-dopant-induced device DC, the gate capacitance, the timing, and the high frequency characteristics fluctuations in nanoscale LAC devices. The conventional LAC device with higher channel [...]

Quantum Dot Gate InGaAs FETs

Jain F., Suarez E., Gogna M., Chan P-Y., Karmakar S., Fikiet J., Miller B., Heller E., University of Connecticut, US

This paper describes using wide energy gap lattice-matched II-VI layers, such as ZnSeTe- ZnMgSeTe, serving as a high-k gate dielectric for n-channel enhancement mode InGaAs field effect transistors (FETs). The thrust is to reduce interface [...]

Plasmonic Enhancement in InGaN/GaN MQW System with Au Nanoparticles

Llopis A., Lin J., Neogi A., Pereira S.M.S., University of North Texas, US

In this article we report experimental evidence of plasmon based enhancement of an InGaN/GaN MQW system using Au nanocrystals. Enhancement of the main peak along with a blue-shift and change in the angle dependent PL [...]

Detailed Analysis of Quantum-Effects in Nanowire Tunneling Transistors with Different Channel-Profiles

Heigl A., Wachutka G., TU Munich, DE

Combining the operational principle of the tunneling field effect transistor with the idea of a multigate channel control appears as an attractive option to avoid unwanted shortchannel effects in nanometer-scale MOS-devices. This motivated us to [...]

Process- and Random-Dopant-Induced Characteristic Variability of SRAM with nano-CMOS and Bulk FinFET Devices

Li T-Y, Li Y., Hwang C-H, Li T-Y, Li Y., National Chiao Tung University, TW

The magnitude of the intrinsic parameter fluctuations, such as process-variation and random dopant fluctuation, steadily increase with the reduction of device dimensions, and lead to pronounced component mismatch in area constrained circuits such as static [...]

Castellated-Gate MOSFETs as Power Transistors for Nanometer CMOS and Post-CMOS Integrated Nanosystems

Seliskar J.J., HiperSem Inc., US

Analysis of the constant-voltage scaling characteristics of Fully-Depleted Castellated Gate (FDCG) MOSFETs reveals near term opportunities for these devices as the replacement for the “thick oxide” I/O device in CMOS System-On-A-Chip (SoC) technologies (e.g. the [...]