Tarik K., Vasileska D., Thornton T.J.
Arizona State University, US
Keywords: cutoff frequency, SOI MESFET
We have already demonstrated that the SOI MESFET device structure is a suitable candidate for micropower circuit applications due to its high anticipated cut-off frequency . Even though the device offers higher fT, there is no guarantee that minimum device dimension will offer optimum performance in terms of voltage gain. To examine this issue, we have developed a transport model, based on the solution of the Boltzmann Transport Equation, for modeling n-channel silicon-on-insulator (SOI) MESFETs using the in-house Ensemble Monte Carlo device simulator. To optimize the performance in terms of figure of merits like cutoff frequency and voltage gain, a matrix of devices has been simulated using different doping densities, various SOI layer thickness and different gate lengths. Then mathematical model is employed where the product of the cutoff frequency and the voltage gain is determined for each device from the matrix of devices we examined and the device which has maximum product is chosen to be the optimum one. From this model it is found that the device with a gate length 90nm, silicon film thickness of 20nm and doping density in the channel of 51017 cm-3 shows optimal performance. So the SOI MESFET device structure is a suitable candidate for application in r.f. micropower circuit design and there exists a device structure with a particular doping, silicon film thickness and gate length that shows optimum performance in terms of cut-off frequency and voltage gain.
Journal: TechConnect Briefs
Volume: 1, Technical Proceedings of the 2006 NSTI Nanotechnology Conference and Trade Show, Volume 1
Published: May 7, 2006
Pages: 669 - 672
Industry sector: Advanced Materials & Manufacturing
Topic: Informatics, Modeling & Simulation
ISBN: 0-9767985-6-5