Novel Nanoeletromechanical Switches for VLSI Power Integrity Improvement

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Complementary Metal Oxide Semiconductor(CMOS)is facing extreme difficulties to realize energy efficient designs while the scaling of channel length has been being at the same pace in the past several decades.In this paper,we presented a novel Nano-Electrical-Mechanical Switch(NEMS, which is developed to address some intrinsic limitations of the CMOS technology due to the feature size shrinking, such as short channel effects,sub threshold leakage,gate tunneling, band to band tunneling current and so on. Theoretical calculation and FEA software simulation have been done to model the NEMS device.To demonstrate the advantages of the novel NEMS devices,a Ternary Content Addressable Memory cell is implemented with only 6 NEMS devices, compared with 12 transistors in the traditional CMOS technology. The reduced number of devices decreases the delay time, realized a better yield and better operation margins.The static and dynamic powers of this NEMS Ternary Content Addressable Memory cell are also calculated. The leakage power of the NEMS TCAM is almost zero. The dynamic power consumption is shown much lower than the TSMC 0.13 um CMOS devices.In this paper, we also study the NEMS switches from the power integrity point of view,and the NEMS devices exhibits a better performance compared with CMOS transistors.

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Journal: TechConnect Briefs
Volume: 4, Advanced Manufacturing, Electronics and Microsystems: TechConnect Briefs 2015
Published: June 14, 2015
Pages: 242 - 245
Industry sectors: Advanced Materials & Manufacturing | Sensors, MEMS, Electronics
Topics: Informatics, Modeling & Simulation
ISBN: 978-1-4987-4730-1