Modeling of gain in advanced CMOS technologies

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The impressive downscaling of CMOS technology and its more and more massive introduction in System-on-chip (SoC) oriented applications require comprehensive modeling approach able to describe such different world (digital and analog) starting from a single technological platform. In this pape we deep insight the modeling of gain, a key parameter ruling the analog performances of advances CMOS technologies, in relation with their layout dependence affected by the shallow trench isolation induced mechanical stress.

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Journal: TechConnect Briefs
Volume: 3, Nanotechnology 2008: Microsystems, Photonics, Sensors, Fluidics, Modeling, and Simulation – Technical Proceedings of the 2008 NSTI Nanotechnology Conference and Trade Show, Volume 3
Published: June 1, 2008
Pages: 825 - 828
Industry sector: Sensors, MEMS, Electronics
Topic: Compact Modeling
ISBN: 978-1-4200-8505-1