MIM Capacitors with stacked dielectrics


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In this work, the characteristics of MIM capacitors with stacked dielectrics are being compared with that with single dielectrics. (100) p-type silicon wafers with resistivity in the range 0.1-0.2 Ωcm have been used as substrate. After cleaning the samples, field oxide of 500 nm thickness has been grown at 10000C. Aluminium has been deposited to act as bottom electrode. This has been followed by four schedules of PECVD in which the dielectrics have been deposited as (i) SiO2, (ii) Si3N4, (iii) SiO2 / Si3N4 and (iv) Si3N4 / SiO2. This has been followed by Aluminium deposition for top electrode. Capacitance voltage (C-V) and current voltage characteristics have been measured using Agilent B1500A semiconductor device analyzer. It can be observed that frequency dispersion is maximum for the device in which Si3N4 acts as the dielectric and minimum frequency dispersion is exhibited by the one with Si3N4 / SiO2 stack. It can be observed that minimum values of α and β are obtained for the MIM device with Si3N4 / SiO2 stack. It is also observed that MIM device with SiO2/Si3N4 stack as the dielectric has maximum breakdown voltage while minimum is shown by the one with Si3N4 as the dielectric.

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Journal: TechConnect Briefs
Volume: 2, Nanotechnology 2012: Electronics, Devices, Fabrication, MEMS, Fluidics and Computational (Volume 2)
Published: June 18, 2012
Pages: 64 - 67
Industry sectors: Advanced Materials & Manufacturing | Sensors, MEMS, Electronics
Topics: Nanoelectronics, Photonic Materials & Devices
ISBN: 978-1-4665-6275-2