Compact modeling and performance analysis of Double-Gate MOSFET-based circuits

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Double-Gate (DG) MOS transistors and related multiple-gate device architectures are nowadays widely identified as one of the most promising solutions for meeting the roadmap requirements for the end-of-the-roadmap integration. One of the identified challenges for the developing of multi-gate devices remains the development of compact models dedicated to circuit simulation. The aim of this work is the implementation in an analog IC circuit simulator (Eldo) of a compact DG MOSFET model and the evaluation of performances in simple DG-based circuits. Recently, we have developed an extended compact model (based on the compact model presented in ref. [5]) for intrinsic long channel devices including analytic drain current, nodes charges and also transconductances and intrinsic capacitances. In this work, we implement drain current and nodes charges for both DG nMOSFET and pMOSFET in Eldo. These models are firstly validated by DC numerical simulations (using the Atlas/Silvaco module). In a second step we simulate in Eldo the transient characteristics of inverters and ring oscillators composed of DG MOSFETs. The inverter time response as well as the inverter delay have been also compared with numerical results obtained using the module Mixed-Mode/Silvaco for long channel DG MOSFET with various channel thicknesses.

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Journal: TechConnect Briefs
Volume: 3, Technical Proceedings of the 2006 NSTI Nanotechnology Conference and Trade Show, Volume 3
Published: May 7, 2006
Pages: 812 - 815
Industry sector: Sensors, MEMS, Electronics
Topic: Compact Modeling
ISBN: 0-9767985-8-1