3D Nanostructured Silicon Relying on Hard Mask Engineering for High Temperature Annealing (HME-HTA) Processes for Electronic Devices

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Annealing silicon at high temperatures in hydrogen ambiance has been reported to induce surface diffusion of silicon; in these conditions, adapted 2D arrays of trenches etched in Bulk Si are transformed into buried cavities creating suspended membranes. A 3D nanostructuration of silicon through hard mask engineering and high temperature annealing in hydrogen ambiance is reported. By using a nitride-oxide hard mask stack instead of a sacrificial oxide hard mask for a free surface (maskless) annealing, we open new technological and design possibilities using 2D arrays of various geometry trenches. Implications and potential device applications are discussed.

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Journal: TechConnect Briefs
Volume: 1, Nanotechnology 2008: Materials, Fabrication, Particles, and Characterization – Technical Proceedings of the 2008 NSTI Nanotechnology Conference and Trade Show, Volume 1
Published: June 1, 2008
Pages: 634 - 637
Industry sector: Advanced Materials & Manufacturing
Topics: Advanced Manufacturing, Nanoelectronics
ISBN: 978-1-4200-8503-7