The optimization of bipolar transistors for high speed applications requires knowing the trade-off between several competing factors, including emitter-base junction charging time, base transit time, base-collector capacitance, high injection degradation, and collector debiasing . Numerical [...]
van Langevelde R., Scholten A.J., Tiemeijer L.F., Havens R.J., Klaassen D.B.M., Philips Research Laboratories, NL
RF-CMOS applications impose increasingly stringent requirements on compact models used in circuit simulation. In this paper several of these issues will be addressed together with a discussion of the state-of-the-art of compact modelling.