CMOS – Page 3 – TechConnect Briefs

Process Modeling Based on Atomistic Understanding for State of the Art CMOS Device Design

Chakravarthi S., Diebel M., Chidambaram P.R., Ekbote S., Dunham S.T., Machala C.F., Johnson S., Texas Instruments, US

Atomistic modeling methods are emerging as a powerful tool to understand the physical behavior of complex systems. However, continuum process simulators are the core of state of the art TCAD simulators and substantial challenges must [...]

Methodology for Model Generation with Accuracy from DC to RF

Zhang X., Williams M., Liu Z., Celestry Design Technologies, US

This paper presents an example modeling flow for generating a RF CMOS model. Initially, the objectives of this modeling approach are analyzed. Then issues in test structure design are discussed. In the section of model [...]

Simulation and Modeling of a Micro Pressure Sensor Array

Jin J., Zhou Z., Georgia Institute of Technology, US

In order to integrate MEM devices with CMOS circuits, compatibility of materials, micron scale mechanical structures, and the fabrication technology with CMOS is imperative. This paper describes the design of a micron scale pressure sensor [...]

Actuation for Probe-Based Mass Data Storage

Alfaro J.F., Fedder G.K., Carnegie Mellon University, US

This paper describes the development of a micro media actuator (MMA) for probe-based mass data storage. The process is based on dry etching and incorporates a thinned silicon media sled to increase the frequency response [...]

An Accurate Photodiode Model for DC and High Frequency SPICE Circuit Simulation

Swe T.N., Yeo K.S., Nanyang Technological University, SG

An accurate photodiode model for DC as well as high frequency SPICE circuit simulation is presented in this paper. The accuracy of the proposed model is verified with the measured data obtained from two different [...]

Automatic Device Design Optimization with TCAD Frameworks

Stockinger M., Selberherr S., Technical University of Vienna, AT

A design optimization method is presented which utilizes automatic optimization capabilities within TCAD frameworks. This method is applied to doping profile optimizations of ultra-low-power CMOS transistors with 0.25 and 0.1 um gate lengths. Two different [...]

Simulations of a New CMOS Compatible Method to Enhance the Breakdown Voltage of Highly-Doped Shallow PN Junctions

Pauchard A., Besse P.A., Popovic R.S., EPFL, CH

Avalanche breakdown often limits the working range of planar junction diodes in electronic circuits and in sensors. We present two-dimensional device simulation results (using MEDICI) of a novel CMOS compatible structure. It combines a floating [...]

CMOS MEMS and their Simulation

Korvink J.G., Emmenegger M., Taschini S., Baltes H., ETH Zürich, CH

The most appropriate tools for the modelling and simulation of MEMS are strongly related to the technology used to fabricate them. CMOS MEMS are naturally combined with circuitry, and in a packaged form they are [...]