Yonemura J. – TechConnect Briefs

On Idlow with Emphasis on Speculative SPICE Modeling

Chen Q., Wu Z-Y, Icel A.B., Goo J-S, Krishnan S., Thuruthiyil C., Subba N., Suryagandh S., An J.X., Ly T., Radwin M., Yonemura J., Assad F., Advanced Micro Devices, US

An empirical correlation model of Idlow, the MOSFET drain current measured at Vgs=Vdd/2 and Vds=Vdd, where Vdd is the supply voltage, is proposed based on the alpha-power law model. It enables a comprehensive analysis of [...]

An A Priori Hysteresis Modeling Methodology for Improved Efficiency and Model Accuracy in Advanced PD SOI Technologies

Chen Q., Goo J-S, Subba N., Cai X., An J.X., Ly T., Wu Z-Y, Suryagandh S., Thuruthiyil C., Radwin M., Zamudio L., Yonemura J., Assad F., Pelella M.M., Icel A.B., Advanced Micro Devices, US

Exploiting the asymmetric nature of interactions among hysteresis, “nonFET”, and DC characteristics, an a priori hysteresis modeling methodology has been proposed as an essential part of an improved model extraction flow for advanced PD SOI [...]