Bindal A. – TechConnect Briefs

An FPGA Architecture Using Vertical Silicon Nanowire Transistors

Bindal A., Wickramaratne D., Hamedi-Hagh S., San Jose State University, US

This study presents an FPGA architecture using vertical silicon nanowire transistors. A complete picture from designing ultra low-power silicon nanowire transistors to their use in an FPGA architecture is given. Post-layout, worst-case rise delay changes [...]

An Integrate and Fire Spiking Neuron Using Silicon Nano-Wire Technology

Bindal A., Hamedi-Hagh S., San Jose State University, US

This study presents a nanometer-scale Integrate and Fire Spike (IFS) neuron cell using vertically-grown, undoped silicon nano-wire transistors. The design cycle starts with determining individual metal gate work functions for each NMOS and PMOS transistor [...]

The Design of a Silicon Wire DRAM Cell for Very Dense DRAM Architectures

Bindal A., Aflatooni K., San Jose State University, US

In this study, we propose a new DRAM cell that uses a silicon-wire pass transistor stacked on top of a high-dielectric capacitor rated of holding industry-standard 32 fCoulomb charge. We show that the performance of [...]