Amon S., Vrtacnik D., Resnik D., Krizaj D., Aljancic U., Levstek A.
University of Ljubljana, SI
Keywords: device isolation, JFET, MEMS, self aligned gate, smart sensors
Self Aligned Gate JFET (SJFET) devices and circuits are reported. The problem of electrical isolation between devices on the same chip is realized through Self Aligned Gate approach, enabling the application of standard bipolar discrete device technology (no epitaxy etc.). SJFET structures and circuits are analyzed by 2D numerical device simulation. SJFET differential amplifier circuit modeling is reviewed as an example. On the basis of modeling, test SJFET structures were designed and fabricated. Measurements on test SJFET structures reveale reasonable agreement with modeling.
Journal: TechConnect Briefs
Volume: Technical Proceedings of the 1999 International Conference on Modeling and Simulation of Microsystems
Published: April 19, 1999
Pages: 435 - 438
Industry sector: Sensors, MEMS, Electronics
Topic: Modeling & Simulation of Microsystems
ISBN: 0-9666135-4-6