Compact Modeling of Tunneling Breakdown in PN Junctions for Computer-Aided ESD Design (CAD for ESD)

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This paper presents compact, physically-based electrothermal models for direct as well as indirect bandgap tunneling processes in pn-junctions for use in network simulators (e.g. Saber or VHDL-A). The model for indirect tunneling has been validated using a 3.3V Si Zener diode (1N4728). Self-heating effects have also been included. The above tunneling breakdown models, together with the compact models for avalanche breakdown presented previously[1] constitute a complete, compact representation of breakdown in ESD zener diodes. Their utility lies in the simulation of large systems of interconnected ESD structures, without detailed device analysis, permitting a ‘CAD-for-ESD’ approach in commercial ESD design.

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Journal: TechConnect Briefs
Volume: 1, Technical Proceedings of the 2002 International Conference on Modeling and Simulation of Microsystems
Published: April 22, 2002
Pages: 628 - 631
Industry sector: Sensors, MEMS, Electronics
Topics: Modeling & Simulation of Microsystems
ISBN: 0-9708275-7-1