Arsenene Substrates Enable a New Era of High-Performance Semiconductors

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Chicago Semiconductor achieved a breakthrough in fabricating two-dimensional layers of Arsenene and Silicene. This was realized for uniform deposition of Arsenic-on-Silicon(112) and Silicene on Silicon (112). The key to stable and uniform Arsenene-on-Silicon (AeOS) and Silicene-on-Silicon (SeOS) layers was discovered and optimized by exploiting unique vacuum techniques, temperatures and annealing processes similar to Silicon/CdTe thin film processes. The existence of a high-quality AeOS substrate was confirmed with calculations, metrology and laboratory research.

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Journal: TechConnect Briefs
Volume: 4, Advanced Manufacturing, Electronics and Microsystems: TechConnect Briefs 2015
Published: June 14, 2015
Pages: 178 - 180
Industry sectors: Advanced Materials & Manufacturing | Sensors, MEMS, Electronics
Topic: Nanoelectronics
ISBN: 978-1-4987-4730-1