We have devised a generic methodology for characterizing airgaps and line slope and including those features in interconnect modeling. The method is silicon-based and can be used to accurately model the impact on capacitance. Our main conclusion is that airgaps result in a significant reduction in capacitance at smaller space. Metal slope on the other hand kick in at moderate-to-large space and results in an increase in capacitance.
Journal: TechConnect Briefs
Volume: Technical Proceedings of the 2005 Workshop on Compact Modeling
Published: May 8, 2005
Pages: 203 - 206
Industry sectors: Advanced Materials & Manufacturing | Sensors, MEMS, Electronics
Topics: Nanoparticle Synthesis & Applications