trap – TechConnect Briefs

Simulation of Surface and Buffer Trapping Effects on Gate Lag in AlGaN/GaN HEMTs

Horio K., Nakajima A., Fujii K., Shibaura Institute of Technology, JP

Two-dimensional simulation of turn-on characteristics of AlGaN/GaN HEMTs is performed in which both buffer traps and sur-face states are considered. It is studied how the so-called gate lag is affected by these factors. It is [...]

Simulation of Decrease in Lag phenomena and Current Slump of Field-Plate GaAs FETs

Itagaki K., Ueda H., Terao Y., Horio K., Shibaura Institute of Technology, JP

Two-dimensional transient analysis of field-plate GaAs MESFETs is performed in which a deep donor “EL2” and a shallow acceptor are considered in a semi-insulating substrate, and the results are compared between the two cases with [...]

Simulation of Field-Plate Effects on Lag and Current Collapse in GaN-based FETs

Itagaki K., Nakajima A., Horio K., Shibaura Institute of Technology, JP

Two-dimensional transient analyses of field-plate GaN MESFETs and AlGaN/GaN HEMTs with a semi-insulating buffer layer have been performed in which a deep donor and a deep acceptor are considered in the buffer layer. Quasi-pulsed I-V [...]

A Study on the Electrical Properties of Plasma Nitrided Oxide Gate Dielectric in Flash Memory

Park M., Suh K., Lee S., Kang H., Kim K., Kim K., Samsung Electronics, KR

In this paper, we address the effect of Plasma Nitridation on the gate dielectric by a combined experimental and simulation study of gate oxidation. Firstly, Boron segregation at the Si/SiO2 interface is experimentally characterized by [...]

Numerical Simulation of Drain-Current Transients and Current Compression in GaN MESFETs

Takayanagi H., Itagaki K., Horio K., Shibaura Institute of Technology, JP

Two-dimensional transient analyses of GaN metal-semiconductor field effect transistors (MESFETs) are performed in which a three level compensation model is adopted for a semi-insulating buffer layer, where a shallow donor, a deep donor and a [...]