A Novel Dual-K Spacer Double Gate Junctionless Transistor for Digital Integrated Circuits
Patil G.C., Patil S.R., Patil G.C., Patil S.R., Borse H.S., Bhosale K.S., Jawake A.V., Aher S.R., JSPM’s Rajarshi Shahu College of Engineering, IN
Recently, junctionless transistors (JLT) have attracted the attention of researchers due to simple fabrication flow and reduced short channel effects. Further, due to better gate control double gate JLT (DGJLT) seems to be a promising [...]