ASIC – TechConnect Briefs

Optimized Topology of an ASIC for Thermal Analysis of Multi-Core Processors

Szermer M., Kotynia L., Zajac P., Janicki M., Napieralski A., Lodz University of Technology, PL

The main goal of the paper is to present the optimized ASIC design for the investigation of thermal-coupling among cores in multi-core processors. In short, we designed a dedicated ASIC composed of regular 16x24 heat [...]

Design of ASIC Dedicated to Thermal Analysis of Many-Core Architectures

Szermer M., Kotynia L., Pietrzak P., Janicki M., Napieralski A., Technical University of Lodz, PL

The main goal of the paper is to present the design of an ASIC dedicated to thermal analysis of many-core architectures. Due to the fact that the process of designing real multi-core microprocessors is expensive [...]

Integrated BMS and Analog IC Charge Isolation Architecture in Large Battery Systems

Choi A., Choi C., Baugh B., Radachonski W., Choi A., Choi C., Chan S-W., 1Power Solutions, US

The significance of battery safety and longevity are magnified in large battery system structures, as those present in Battery Electric Vehicles (BEVs), and Underwater Autonomous Vehicles (UAVs), and specialized aerospace, army, and navy battery applications. [...]

Test ASIC for Real Time Estimation of Chip Temperature

Szermer M., Kulesza Z., Janicki M., Napieralski A., Technical Univiversity of Lodz, PL

The main goal of this paper is to present in detail the design and operation of an ASIC, which will be used in the research aimed at the development of a real time temperature monitoring [...]