New Elements and Features in the Process Design Kits for a FinFET Technology
Lu N., Baizley A., Guan X., Johnson J., McCullen J., Ozbek A., Rahman A., Wang H., Yu M., Zemke C., Rausch W., Wachnik R., IBM, US
Parasitic resistance is a primary performance constraint in FinFET technologies. We report that new and innovative elements and features have been introduced into Process Design Kits for 14nm FinFET technology. They enable accurate and efficient [...]