Mahapatra S. – TechConnect Briefs

Analytical Surface Potential Solution for Low Effective Mass Channel Common Double Gate MOSFET

Chakraborty A.S., Jandhyala S., Mahapatra S., Indian Institute of Science, Bangalore, IN

Obtaining an accurate although computationally efficient analytic solution for surface potential is the key step towards developing compact model for Low Effective Mass channel material Common Double Gate (CDG) MOSFETs [1]. In our previous work [...]

NQS Modeling of independent DG MOSFET using RTA Approach

Sharan N., Mahapatra S., Indian Institute of Science, IN

We propose a new set of Relaxation Time Approximation (RTA) based Non Quasi Static (NQS) model for independent double gate MOSFETs by taking into account the fact that any gate can be the dominant gate. [...]

Electro-thermal aspects in carbon based interconnects

Verma R., Bhattacharya S., Mahapatra S., Indian Institute of Science, IN

The tremendous rise in Joule-heating in conventional ICs has led down ITRS to ensure on material alternatives that surpasses break-down current density and thermal conductivity (κ) beyond room temperature (RT). In recent years, suspended metallic [...]

Modeling and Analysis of MOS Capacitor Controlled by Independent Double Gates

Thakur P.K., Mahapatra S., Indian Institute of Science, Bangalore, IN

This paper, for the first time, explores the charcatersictics of MOS capacitor controlled by independent double gates by numerical simulation and analytical modeling for its possible use in RF circuit design as a varactor. By [...]

II-VI Semiconductor Quantum Wire Fabrication and Application to IR Detection

Crouse D.T., Crouse M., Crouse D.T., Crouse M., Mahapatra S., Ikram A.A., City College of New York, US

A nanoporous alumina template has been developed that provides a practical and flexible method of fabricating semiconductor and metal nanowires on any desired substrate. In situ electrochemical techniques are used to transform this multilayer precursor [...]