Louie M.Y. – TechConnect Briefs

Backside Nanoscale Texturing to Improve IR Response of Silicon Photodetectors

Forbes L., Louie M.Y., Oregon State University, US

When the silicon is not strongly absorbing in the near infrared a back side textured surface works in conjunction with a totally internally reflecting front side surface to best increase the absorption of near infrared [...]

Single Election Trapping in Nanoscale Transistors; RTS(Random Telegraph Signals) and l/f Noise

Forbes L., Miller D.A., Louie M.Y., Oregon State University, US

Random telegraph signal, RTS, noise[1] is most obvious in submicron devices with traps, for example in nanoscale MOS transistors, MOSFET’s, with a low number of carriers. RTS is sometimes an indicator of poor device quality [...]

1/f Noise and RTS(Random Telegraph Signals) and Read Errors in Nanoscale Memories

Forbes L., Miller D.A., Louie M.Y., Oregon State University, US

The use of charge storage on nanoscale particles has been realized in silicon integrated circuit memories [1,2] and utilized in commercial products[2]. An analysis has previously been made of the increasing portion of the threshold [...]

Technique for Time and Frequency Dependent Solutions of the Diffusion Equation: Application to temperature of nanoscale devices

Forbes L., Wanalertlak W., Louie M.Y., Oregon State University, US

Typical CMOS device currents have remained around 1mA/um while devices have scaled down. The projection into the 2010 time frame is 0.01um or 10nm dimensions with 0.5V power supplies which results for a minimum dimension [...]