Kotynia L. – TechConnect Briefs

Optimized Topology of an ASIC for Thermal Analysis of Multi-Core Processors

Szermer M., Kotynia L., Zajac P., Janicki M., Napieralski A., Lodz University of Technology, PL

The main goal of the paper is to present the optimized ASIC design for the investigation of thermal-coupling among cores in multi-core processors. In short, we designed a dedicated ASIC composed of regular 16x24 heat [...]

Design of ASIC Dedicated to Thermal Analysis of Many-Core Architectures

Szermer M., Kotynia L., Pietrzak P., Janicki M., Napieralski A., Technical University of Lodz, PL

The main goal of the paper is to present the design of an ASIC dedicated to thermal analysis of many-core architectures. Due to the fact that the process of designing real multi-core microprocessors is expensive [...]