IBM Microelectronics – TechConnect Briefs

Enhanced Junction Capacitance Modeling

Anderson F.G., Rassel R.M., Lavoie M.A., IBM Microelectronics, US

The current standard diode junction capacitance models do not yield high quality models for hyperabrupt junction varactors that are constructed from several implants. We describe a new enhancement that employs the actual (exponential) doping profiles [...]

How to Build an SOI MOSFET Compact Model without Violating the Laws of Physics

Watts J., IBM Microelectronics, US

An important application for partially depleted SOI is high performance microprocessors and other logic chips. In order to deliver market leading performance it is necessary for transistor design and circuit design to be done concurrently. [...]

Present Status and Future Direction of BSIM SOI Model for High-Performance/Low-Power/RF Application

Fung S., Su P., Hu C., IBM Microelectronics, US

The recent progress of BSIM (Berkeley Short-channel IGFET Model) SPICE models extended for SOI transistors are reviewed. The models cover partially depleted (PD), fully depleted (FD) and dynamic depletion (FD) (automatically transition between PD and [...]