The history of the developments of “compact” models for SOI MOSFETs at the University of Florida (UF) is reviewed. The uniqueness and innovation of the UF “process-based” models are reiterated, and their global utility as excellent SOI research/education tools for more than 25 years is exemplified. Floating-body (FB) hysteresis, G-S/D underlap, bulk inversion, and pseudo-latch (recent) are noted as new insights on SOI devices (i.e., PD and FD MOSFETs, DG FinFETs, and FB DRAM cells) that were attained using the UF “ugly duckling” Spice compact models.
Journal: TechConnect Briefs
Volume: 2, Nanotechnology 2011: Electronics, Devices, Fabrication, MEMS, Fluidics and Computational
Published: June 13, 2011
Pages: 714 - 719
Industry sector: Sensors, MEMS, Electronics
Topics: Compact Modeling