This paper highlights the impact of non-stationary transport on performances of deep submicron CMOS bulk technology. We present a quantitative analysis of technology influence on the needed level for carrier transport modeling (Drift-Diffusion versus Energy Balance). The analysis is performed on realistic devices, showing which electrical features have to be taken into account for evaluating the performances of advanced device architectures (down to 50nm gate length). An original point of this work is the investigation of technology influence (channel doping and LDD doping) on injection velocity at source side and on drain current. We conclude that specific engineering of access region have to be envisaged for taking full advantage of non-stationary effects on nowadays device performances.
Journal: TechConnect Briefs
Volume: 1, Technical Proceedings of the 2001 International Conference on Modeling and Simulation of Microsystems
Published: March 19, 2001
Pages: 462 - 465
Industry sector: Sensors, MEMS, Electronics
Topic: Modeling & Simulation of Microsystems