Chakraborty R.S., Narasimhan S., Bhunia S.
Case Western Reserve University, US
Keywords: bitline leakage, CNEMS, hybridization, leakage power, robust embedded memory design
Embedded static random access memory (SRAM) that constitutes an integral part of nanoelectronic systems, experiences two major challenges with aggressive technology scaling: 1) exponential increase in leakage current [1] and 2) decrease in robustness of read/write/hold operation [1]. We propose, for the first time, integration of carbon nanotube (CNT) based nano electro-mechanical switches (NEMS) with CMOS-based SRAM to achieve significant improvement in: 1) leakage power in standby mode (~19X compared to the best existing technique) and 2) robustness of read/write operation due to bitline leakage reduction (~55X).
Journal: TechConnect Briefs
Volume: 1, Technical Proceedings of the 2007 NSTI Nanotechnology Conference and Trade Show, Volume 1
Published: May 20, 2007
Pages: 134 - 137
Industry sectors: Advanced Materials & Manufacturing | Sensors, MEMS, Electronics
Topics: Nanoelectronics, Photonic Materials & Devices
ISBN: 1-4200-6182-8