In many new applications like communication and automotive electronics the usage of integrated high voltage MOS transistors (LDMOS and DMOS) requires highly accurate compact models. At first we discuss the industrial requirements for modern high voltage/analog design and design kit including compact models. Secondly we present a deep look into special LDMOS transistor behavior and discuss state of the art modeling approaches. Sub-circuit modeling with BSIM/EKV core and JFET/Resistor will be shown. Parasitic diode and bipolar effects will be discussed and modeling suggestions will be presented. The EKV high voltage model developed by Swiss Federal Institute of Technology (EPFL) and the MM20 high voltage model introduced by NXP Research (formerly Philips Research) Laboratories will be demonstrated in detail. The first CMC (Compact Modeling Council) Standard high voltage MOSFET model HiSIM_HV developed by Hiroshima University will explained as well. The features and limitations of the different models will be compared. Benchmark cases will show details like model accuracy, simulation time and convergence. Finally, advanced characterization and measurement strategies for LDMOS parameter extraction and modeling will be described.
Journal: TechConnect Briefs
Volume: 2, Nanotechnology 2011: Electronics, Devices, Fabrication, MEMS, Fluidics and Computational
Published: June 13, 2011
Pages: 742 - 746
Industry sector: Sensors, MEMS, Electronics
Topics: Compact Modeling