This paper describes a hiercihical functional verification system for a core-based system design which minimizes complexity in testbenches while maximizing flexibility in terms of number of clocks and system interfaces and reducing time-to-market. The verification system also provides a defined methodology for early operating system and application software debug.
Journal: TechConnect Briefs
Volume: Technical Proceedings of the 1998 International Conference on Modeling and Simulation of Microsystems
Published: April 6, 1998
Pages: 426 - 430
Industry sector: Sensors, MEMS, Electronics