Bottom-up device simulations: modeling electrical currents on the atomic scale

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As device features approach atomic dimensions, simulations of electrical currents need to be based on a quantum-mechanical description of the system. New phenomena then appear which can be exploited for novel device functionality, but also fundamental challenges arise when the influence of single defects can have devastating effects. A realistic atomistic description of the device configuration is therefore required in order to properly describe impurities and defects. Although atomic-scale calculations of tunneling currents have become mainstream over the last decade, many challenges remain. Tight-binding models work for many systems, but fail e.g. for interfaces combining metals and semiconducting materials, in which cases first-principles [1] or semi-empirical [2] methods are necessary. For transistor applications it is necessary to include gates and dielectric regions. Moreover, all needs to be carried out for systems that involve thousands of atoms. Ideally one would like to combine the different methods in a multi-scale approach, from first principles to classical models, but few simulation tools comprise such a variety of methods or the infrastructure to integrate them. We will provide an overview of these and other aspects of state-of-the-art atomic-scale modeling, and show examples of how our software Atomistix ToolKit is used to study a variety of nanoelectronic structures, such as graphene field-effect transistors, molecular junction diodes, contact resistance of metal-semiconductor interfaces, leakage currents in ultrathin oxide layers, etc.

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Journal: TechConnect Briefs
Volume: 2, Nanotechnology 2011: Electronics, Devices, Fabrication, MEMS, Fluidics and Computational
Published: June 13, 2011
Pages: 603 - 606
Industry sector: Advanced Materials & Manufacturing
Topic: Informatics, Modeling & Simulation
ISBN: 978-1-4398-7139-3