Single crystal silicon is widely used in the microelectronic industry. Recent advances in ultra precision machining have enabled the possibility of direct diamond turning of high quality surfaces on the brittle materials. As a brittle material, silicon wafer is not amenable to conventional machining operations because of its low fracture toughness . It was reported that the machining process is in the ductile regime and the chip thickness must be less than the critical value, which depends on the machining conditions, tool parameters and the property of material. For machining brittle materials in the ductile regime, the working force must be very low. When processing units of atomic-bit size are used, a serious problem arises: the resisting shear of breaking stress becomes extremely large [2,3]. The curve in the figure 1 shows that as the chip thickness becomes smaller, the resisting shear stress at the cutting edge of a solid bite tool becomes extremely large, approaching the theoretical shear stress. As the results, the general micro mechanical machining is difficult to get the high machine-ability and fine surface quality. For producing high quality surface and form accuracy, chemically assisted micro mechanical machining process was suggested in this study. The chemical solution generally increases the binding energy of the materials, and then the grain is removed from the raw material. The surface is not only etched but also reacted by the chemical absorption. The reacted surface is able to easily remove by a little energy source such as a mechanical tool. Almost of the materials are able to make the chemically reacted layer by the chemical solution. This study is focused on making the chemically reacted layer, and analyzing the properties. A basic principle of suggested method is described as the following. The chemical solution generates the reacted layer on the material surface. And then, the process is progressed by a mechanical tool. The chemical solution changes properties of the raw material. For example, one of the hard brittle material, Si wafer changes to hydrated layer by KOH solution. Figure 2 are shown the principle and machining schematic diagram of C3M process. In order to understand how the chemically reacted layer works, the experimental condition associated with micro indentation testing was done. The plastic character of the indented material is accounted for by relaxing the elastic loading stresses through both the introduction of new nucleated discrete dislocations and their motion within the sample. The observations of the indent-induced plastic volume and analysis of the experimental loading curve help in defining a complete set of nucleation rules . As shown in figure 3 (a), (b), the fracture on the surface with chemical layer is smaller. The hardness and modulus value of silicon wafer (a) is 1473.3[Hv], 103.43Gpa, respectively. In the case of silicon surface with the chemically reacted layer (b), the hardness and modulus value was 48.67[Hv], 57.768Gpa, respectively. It is thought that the chemically reacted layer restricts the micro crack and fracture generation. It was also observed the thickness, dynamic friction coefficient, and scratch test of the silicon wafer with the chemically reacted layer. From the experimental results, the micro channel with 5mm in the line width was fabricated (Figure 4). It is an important to understand and analyze the chemically reacted layer in this process. For the analysis of the reacted layer, the micro indenter, scratch tester, XPS analysis was used. It is confirm that the chemically reacted layer on the silicon wafer reduces the micro and facture generation. Chemically assisted micro mechanical machining gave an advantage over the groove machining with narrower and deeper grooves in comparison to the conventional machining.
Journal: TechConnect Briefs
Volume: 1, Technical Proceedings of the 2003 Nanotechnology Conference and Trade Show, Volume 1
Published: February 23, 2003
Pages: 514 - 517
Industry sector: Sensors, MEMS, Electronics
Topics: Advanced Manufacturing, Nanoelectronics