topography – TechConnect Briefs

Fabricating Nanoscale Features Using the 2-Step NERIME TSI Nanolithography Process

Gilmartin S.F., Arshak A., Arshak K., Collins D., Korostynska O., Arshak A., Arshak K., Analog Devices, IE

The 2-step negative resist image by dry etching (2-step NERIME) focused ion beam (FIB) top surface imaging (TSI) process is a novel nanolithography technique for creating nanometer scale resist features using conventional DNQ/novolak resists. The [...]

Modeling and Simulation of 3D Structures for Gigabit DRAM

Kwon O., Yoon S., Ban Y., Won T., Inha University, KR

In this paper, we present a 3D topography simulator, so-called 3D-SURFILER(SURface proFILER), to model a complicated 3D structure on the substrate for gigabit DRAMs. The 3D-SURFILER comprises a deposition and etching simulator employing a cell [...]