hot-carrier effects – TechConnect Briefs

Impact of Non-Uniformly Doped and Multilayered Asymmetric Gate Stack Design on Device Characteristics of Surrounding Gate MOSFETs

Kaur H., Kabra S., Haldar S., Gupta R.S., University of Delhi, IN

In the present work, a new structural concept, non-uniformly doped multilayered asymmetric gate stack (ND-MAG) surrounding gate MOSFET has been proposed and it has been demonstrated using analytical modeling and simulation that ND-MAG SGT leads [...]

A New Analytical Model of Channel Hot Electron (CHE) and CHannel Initiated Secondary ELectron (CHISEL) Current Suitable for Compact Modeling

Larcher L., Pavan P., Università di Modena e Reggio Emilia, IT

This paper presents for the first time a new approach to hot-carrier phenomena leading to an analytical model of both Channel Hot Electron (CHE) and CHannel Initiated Secondary ELectron (CHISEL) currents. This model can be [...]

Modelling of the “Gated-Diode” Configuration in Bulk MOSFET’s

Yip A., Yeow Y.T., Samudra G.S., Ling C.H., TECH Semiconductor, SG

A study of the “gated-diode” configuration in MOSFET’s for characterising hot-carrier degradation by employing 2-D simulations is presented in this paper. We use both process and device simulations to understand operational sensitivity of this technique. [...]