Veeraraghavan S. – TechConnect Briefs

A Surface-Potential-Based Extrinsic Compact MOSFET Model

Gu X., Gildenblat G., Workman G., Veeraraghavan S., Shapira S., Stiles K., Pennsylvania State University, US

This work presents the extrinsic part of a recently developed advanced surface-potential-based compact MOSFET model (SP). At present, it includes a novel engineering gate current model, a substrate current model valid in all regions of [...]

A Surface-Potential-Based Compact Model of NMOSFET Gate Tunneling Current

Gu X., Wang H., Gildenblat G., Workman G., Veeraraghavan S., Shapira S., Stiles K., Penn State University, US

The continued aggressive scaling of the gate oxide thickness makes the accurate modeling of the gate tunneling current an important aspect of the MOSFET compact model. This work presents a new compact model of which [...]