Suzuki E. – TechConnect Briefs

Device Parameter Extraction from Fabricated Double-Gate MOSFETs

Tsutsumi T., Liu Y., Nakagawa T., Sekigawa T., Hioki M., Suzuki E., Koike H., National Institute of Advanced Industrial Science and Technology (AIST), JP

Accurate spice simulation needs parameter extraction of the fabricated DG-MOSFETs with good electrical characteristics. However, it is very difficult to fabricate such good DG-MOSFETs, so that device parameter extraction of the fabricated DG-MOSFETs has been [...]

Compact Model for Ultra-Short Channel Four-Terminal DG MOSFETs for Exploring Circuit Characteristics

Nakagawa T., Sekigawa T., Tsutsumi T., Hioki M., Suzuki E., Koike H., National Institute of Advanced Industrial Science and Technology (AIST), JP

We have proposed a compact model of the DG MOSFETs which handles two gates independently. The model can simulate the DG MOSFETs of asymmetric gate design, together with their four-terminal operation. In this report, we [...]

Improved Compact Model for Four-Terminal DG MOSFETs

Nakagawa T., Sekigawa T., Tsutsumi T., Hioki M., Suzuki E., Koike H., National Institute of Advanced Industrial Science and Technology, JP

Double-gate field-effect transistors are promising device structures which have excellent scalability. To evaluate merits of DG MODFETs, we developed a compact four-terminal DG MOSFET model by adopting the double charge-sheet model. In this presentation, we [...]

Primary Consideration on Compact Modeling of DG MOSFETs with Four-terminal Operation Mode

Nakagawa T., Sekigawa T., Tsutsumi T., Suzuki E., Koike H., Electroinformatics Group, AIST, JP

Recently, a double-gate structure has attracted much attention as an emerging device concept. The DG MOSFET is regarded as the most scalable device. Usually the DG MOSFET is supposed to be used as a three-terminal [...]