Subramanian Y. – TechConnect Briefs

Compact Modeling of Tunneling Breakdown in PN Junctions for Computer-Aided ESD Design (CAD for ESD)

Subramanian Y., Darling R.B., University of Washington, US

This paper presents compact, physically-based electrothermal models for direct as well as indirect bandgap tunneling processes in pn-junctions for use in network simulators (e.g. Saber or VHDL-A). The model for indirect tunneling has been validated [...]

Compact Modeling of Avalanche Breakdown in pn-Junctions for Computer-Aided ESD Design (CAD for ESD)

Subramanian Y., Darling R.B., University of Washington, US

This paper presents and validates compact, physically-based electrothermal models of the avalanche process in pn junctions for use in network simulators (e.g. Saber). Self-heating effects are also included. This enables the simulation of large systems [...]

Compact Models for Smart Pixels with Smart Illumination

Subramanian Y., Azadeh M., Darling R.B., University of Washington, US

Smart Pixels with Smart Illumination (SPSI) is a recently developed technology that enables the monolithic integration of two functionalities-optical illumination and detection- into arrays of optoelectronic ‘pixels’ in a compact and robust manner. To facilitate [...]

A Compact Model for an IC Lateral Diffused MOSFET Using the Lumped-Charge Methodology

Subramanian Y., Lauritzen P.O., Green K.R., Texas Instruments, US

A compact model for an IC Lateral Diffused MOSFET is developed using the Lumped-Charge Methodology[1]. Model equations and key performance characteristics are documented. They satisfy the requirements of Power MOSFET models[2], unlike the competitive macromodels [...]