Nomoto A. – TechConnect Briefs

Simulation of Current Slump Removal in Field-Plate GaAs MESFETs with a Thin Passivation Layer

Nomoto A., Sato Y., Horio K., Shibaura Institute of Technology, JP

In compound semiconductor FETs, slow current transients are often observed even if the drain voltage VD or the gate voltage VG is changed abruptly [1]. This is called drain lag or gate lag, and undesirable [...]

Simulation of Current Slump Removal in Field-Plate GaAs MESFETs

Nomoto A., Satoh Y., Horio K., Shibaura Institute of Technology, JP

Two-dimensional transient analysis of field-plate GaAs MESFETs is performed by considering surface states in the region from the gate toward the drain. Quasi-pulsed current-voltage curves are derived from the transient characteristics. It is shown that [...]