Tudor B., Wang J.W., Hu B.P., Liu W., Lee F.
Synopsys, Inc., US
Keywords: EDMOS compact, extraction, HVMOS, LDMOS, model, parameter
The paper presents a high-voltage compact MOSFET model that has been proven physically accurate and numerically robust for various and generations of high-voltage ED (extended drain) and LD (laterally double diffused) production CMOS process technologies. The model’s accuracy in handling currents, conductances and capacitances, and its scalability over bias, device geometry and temperature have been proved to be consistently better compared to existing solutions.
Journal: TechConnect Briefs
Volume: 3, Nanotechnology 2008: Microsystems, Photonics, Sensors, Fluidics, Modeling, and Simulation – Technical Proceedings of the 2008 NSTI Nanotechnology Conference and Trade Show, Volume 3
Published: June 1, 2008
Pages: 804 - 807
Industry sector: Sensors, MEMS, Electronics
Topic: Compact Modeling
ISBN: 978-1-4200-8505-1