Papers – Page 41 – TechConnect Briefs

Numerical Analysis on Si-Ge Nanowire MOSFETs with Core-Shell Structure

Fu Y., He J., Liu F., Zhang L., Feng J., Ma C., Peking University, CN

This paper investigates the transport properties of the silicon/Germanium nanowire MOSFETs with core-shell structure by a numerical method. Coupling Poisson’s equation to Schrödinger’s equation for electrostatics calculation, and electron structure to current transport equation for [...]

Effect of swift heavy ion on CdS quantum dots embedded in PVA matrix and their applications

Gope G., Chakdar D., Avasthi D.K., Paul M., Nath S.S., NIT Silcchar, IN

We report synthesis of CdS quantum dots by chemical route at room temperature. In this technique CdS specimen are produced by simple chemical reactions where polyvinyl alcohol (PVA), acting as matrix, plays the key role [...]

Quantum Fourier Transform Circuit Simulator

Campero A., Iuga C., Duchen G.I., Universidad Autónoma Metropolitana, MX

Quantum Fourier transform is of primary importance in many quantum algorithms. This paper presents the development of a Quantum Fourier Transform Circuit Simulator system that processes classical analog signals and presents the results of the [...]

Three-Dimensional-Topology Processing and Memory Cells For Molecular Electronics

Lyshevski M.A., Lyshevski S.E., Lyshevski M.A., Lyshevski S.E., Microsystems and Nanotechnologies, US

This paper researches an innovative molecular electronics solution for molecular processing platforms which utilize three-dimensional (3D) topology molecular electronic devices and 3D system organization. Departing form the conventional concepts, we use the polypeptides as a [...]

Benchmarking Performance and Physical Limits of Processing Electronic Device and Systems: Solid-State and Molecular Paradigms

Lyshevski S.E., Shmerko V., Yanushkevich S., Rochester Institute of Technology, US

We study physical limits and research performance estimates. The designer examines the device and system performance and capabilities using distinct performance measures, estimates, indexes and metrics. At the device level, we examine functionality, study characteristics [...]

Tunnel Field Effect Transistor (TFET) with Strained Silicon Thinfilm Body for Enhanced Drain Current and Pragmatic Threshold Voltage

Kumar M.J., Saurabh S., Indian Institute of Technology, IN

Quantum tunneling devices are very promising as they have very low leakage current and show good scalability. However, the most serious drawback for tunneling devices hampering their wide-scale CMOS application is their low on-current and [...]

Well-ordered Semiconductor Wire-Arrays Driven by in-Fibre Capillary Layer Breakup

Deng D.S., Orf N., Abouraddy A.F., Fink Y., Massachusetts Institute of Technology, US

One-dimensional structures with nanometre scale have been demonstrated with substantial progresses for device applications in electronics, photonics, photovoltaics and biology. The fabrication for the well-ordered extended semiconductor wires is highly desirable for the alignment and [...]

Month: June 2008